HDL Code Generation for Mixed-Signal systems such Memory arrays and ADC using SIMULINK MODELS

I'm seeking an experienced Simulink HDL coder to assist with a project focused on generating and optimizing HDL code from Simulink models. The models primarily consist of mixed-signal systems such as memory array and ADC, so previous experience working with these is crucial. The objective is to target this code to Field Programmable Gate Arrays. Ideal Skills and Experience: • Extensive experience with Simulink HDL coder • Understands how to optimize HDL code • Previous work with mixed-signal systems • Experience with FPGA and ASIC implementation This is an excellent opportunity for an experienced coder who is familiar with Simulink Model and has a solid understanding of HDL code and mixed-signal systems. Your expertise in these areas will greatly contribute to the success of the project.