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DDS in HDL

₹600-1500 INR

Closed
Posted about 3 years ago

₹600-1500 INR

Paid on delivery
Generate DDS for 100MHz
Project ID: 29709275

About the project

4 proposals
Remote project
Active 3 yrs ago

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4 freelancers are bidding on average ₹975 INR for this job
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Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, DC Compiler, ICC and others. I have completed direct digital synthesizer project before. Please see this review: https://www.freelancer.com/projects/verilog-vhdl/Direct-Digital-Synthesis-VHDL/reviews Please contact me to discuss more about this project. Thanks.
₹600 INR in 1 day
5.0 (16 reviews)
4.0
4.0
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Hello Dear, I have 5 year experience in FPGA design. currently I am new to start a freelance and I have read your project details. I have already done this type of work on xilinx. you can trust on me hopefully I will give you best services Thanks
₹750 INR in 3 days
0.0 (0 reviews)
0.0
0.0
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I am a working professional in the field of VLSI System design. With prior experience in signal processing and communication systems I feel I can confidently take up this task. Looking forward to hearing from you.
₹1,050 INR in 7 days
0.0 (0 reviews)
0.0
0.0
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Hi, I have 10+ exp in Verilog & VHDL coding. Would like understand the task more in detail & ensure that I can complete it on time. Please give me a chance to earn your trust. Looking forward to work with you! Thanks
₹1,500 INR in 5 days
0.0 (0 reviews)
0.0
0.0

About the client

Flag of INDIA
Hyderabad, India
0.0
0
Member since Mar 28, 2021

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