semiconductor in MOSFET

I need MOSFET design. Use the MOSFET simulator on [login to view URL] ([login to view URL]) to design an n-type MOSFET using the following specifications: Uniform doping density Channel length = 22 nm Oxide thickness ≥ 0.8 nm S/D length ~ 2×Channel length Junction depth ~ Channel length Substrate thickness ~ 40 nm Device width = 1000 nm S/D doping concentration = 2×1020 cm-3 Channel doping concentration ≤ 1×1019 cm-3 Substrate doping concentration = 5×1016 cm-3 On the “model” phase, carefully look through the input parameters. Use the following: Gate type: n+ polysilicon Activate the following models (set ‘yes’): Concentration dependent scattering Vertical field dependent mobility Parallel field dependence On the “voltage sweep” phase: Maximum supply voltage (VG and VD) = 0.8 V Plot along length = ‘yes’ Plot along depth = ‘yes’ Where to plot 1-D plots along length ≡ 5nm Where to plot 1-D plots along depth ≡ 55nm Desired outputs: Maximum current ≥ 600 μA Off current (for VG = 0V and VD = 0.8V) ≤ 10 μA S ≤ 200 mV/dec Attach the snapshots of IV characteristics and your calculation with the report. Hint: You should be fine-tuning the “oxide thickness” and/or “channel doping density” mainly keeping in mind their (lower/upper) limits. You need to plot two curves for the ID-VGS characteristic for VD = 0.05 and 0.8 V. Also, sweep your gate voltage from -0.5V to 0.8 V (threshold voltage can be negative with n+ polysilicon gates!).