Knowledge in data communication and networking (Carrier
Ethernet network, Layer 2 switching, Layer 3 router…).
- Knowledge in encrypt, decrypt(AES/GCM), compress,
decompress(LZRW1) data.
- Programming Language: C, C++, Verilog, VHDL, Assembly.
- Digital signal and process in FPGA.
- Knowledge standard of data communication and networking.
- Knowledge standard of IP security(IPsec) and MAC
security(MACsec).
- Knowledge standard of comress and decompress.
- Application and structure to design of routers.
- Have skill using Matlab, Quartus, EDA tool, Vivado .
Some project i have already designed
Project: IPsec using advanced encryption standard (IP)
Description: Design IP for encrypt and decrypt data throughput up to
20Gbps, 1K channel. Using AES/GCM algorithm.
Language: Verilog
Project: Design IP for compress and decompress payload of IP packet
using LZRW1 algorithm
Description: IP have throughput up to 4Gbps, 512 channel.
Project: Design “graphic overlay” IP
Description: Design an IP to display text and images in video screen using
kit FPGA cyclone III. Using microprocessor nios II to control location and
content of text and images.
Support tools: Quartus, Modelsim, Nios II IDE, Matlab…
Language: Verilog, C.