asynchronous design
$30-250 USD
Paid on delivery
1. An electrical system is protected by a fault detector. If a fault occurs within the system, a fault signal activates an alarm buzzer. The green light that indicates fault-free operation is switched off by the fault signal and a red light is switched on. When the fault is acknowledged by the system controller, the alarm buzzer is turned off. After the fault has been cleared, the green light is switched on and the red light is switched off. A test signal is to be provided to check the operation of the fault detector. Develop an appropriate state diagram and systematically implement your asynchronous design. Show your work to design a race-free and hazard free asynchronous design. Sketch the design.
2. Use Quartus/ModelSim or Synopsys toolset to implement the design of Problem 1 in HDL. Report your HDL code and show resulting waveforms when simulating your circuit with a few test inputs.
i want the assignment through two or three days.
plz use the steps the i will attach in slide 39 in PDF 7-3cpe515
read the example in this file and do same as .
Project ID: #5203428
About the project
7 freelancers are bidding on average $176 for this job
Hi, I am a graduate in EEE. I have 15 years of experience in design,programming and teaching. I have good experience in FPGAs using VHDL and Verilog. I can do this work for you. Thanks and Regards, Prasad.M
Well your assignment seems legit in the meanwhile composed of very basic concepts. As mentioned I will send you the required code in under 24 hr approx. As an engineer I can take care of such fundamental concepts very More
i can help you . i am very good in verilog and have many years professional experience in this filed. i will assure you good and quality work.
I currently am working in a company that works on fpga based embedded systems. I have accomplished projects bigger than it in just couple of days notice.