Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    13 jobs found, pricing in USD
    Beam hash v3 for fpga miner 6 days left
    VERIFIED

    Project is for fpga chip vu35p. Algorithm beam hash 3. Must work via uart and have a windows miner exe file to launch the miners once programmed . Looking for 250 sol hashrate or higher . 2 week build timeline. The vu35p has 8gb hbm on chip memory which should make this a simpler project

    $1658 (Avg Bid)
    $1658 Avg Bid
    11 bids
    Vhdl functional verification 6 days left
    VERIFIED

    Rtl verification and validation assertion testcase and test procedure

    $10 (Avg Bid)
    $10 Avg Bid
    4 bids
    Vivado 2018 project 6 days left
    VERIFIED

    hI i want to work on vivado project

    $541 (Avg Bid)
    $541 Avg Bid
    17 bids
    Build code 5 days left
    VERIFIED

    Hello, I need help with VHDL in digital system design.

    $41 (Avg Bid)
    $41 Avg Bid
    11 bids

    Hello, I need to implement a TCP/IP protocol between a PC and Altera FPGA for one of my project. Please bid if you're an expert and already you have the proven results with you.

    $200 (Avg Bid)
    $200 Avg Bid
    5 bids
    VHDL Firmware Expert needed 4 days left
    VERIFIED

    I've FPGA based ADC/DAC board. Currently I'm looking for an VHDL expert using Altera(intelFPGA) tool. Please share your experience in the proposal. Which FPGA chip did you use before?

    $991 (Avg Bid)
    $991 Avg Bid
    17 bids

    more details will be given in the chat

    $50 (Avg Bid)
    $50 Avg Bid
    2 bids
    Logisim project 2 days left

    In this project you will implement a modified hangman game machine with Logisim. For the game, the minimum requirements are as follows: 1. The word is taken as 64-bit input. 2. Each 8 bit refers to the ascii code of a character. Therefore, the word is 8 characters at most. For instance “hello” is represented as: 00000000 00000000 00000000 01101000 01100101 01101100 01101100 01101111 3....

    $125 (Avg Bid)
    $125 Avg Bid
    5 bids

    I need a creative person in Fuzzy Logic System

    $17 (Avg Bid)
    $17 Avg Bid
    8 bids

    immediately required Verilog and Matlab programmer to solve a problem. I will pay 250/ hour.

    $3 / hr (Avg Bid)
    $3 / hr Avg Bid
    14 bids

    I want to learn how to design a double loop controller mathematically and study the stability for boost converter

    $44 (Avg Bid)
    $44 Avg Bid
    9 bids

    Proficient in System Verilog/UVM/OVM, OOP/C++ • GPU, or Memory System • code coverage and functional coverage driven verification methodology • creating, running and debugging of SystemVerilog/UVM constraint-random Testbench

    $7 / hr (Avg Bid)
    $7 / hr Avg Bid
    13 bids